bcm-specs

[Specification

The BackPlane always contains one core responsible for interacting with the computer. In most cards, it is connected via the pci core. This core has a Core ID of 0x804.

Special PCI core registers are:

Offset

Size (bytes)

Meaning

0x0

4

PCI Control

0x10

4

PCI Arbiter Control

0x20

4

Interrupt Status

0x24

4

Interrupt Mask

0x28

4

Backplane to PCI Mailbox

0x50

4

Backplane Broadcast Address

0x54

4

Backplane Broadcast Data

0x60

4

GPIO In (Rev >= 2)

0x64

4

GPIO Out (Rev >= 2)

0x68

4

GPIO Enable (Rev >= 2)

0x6C

4

GPIO Control (Rev >= 2)

0x100

4

Backplane to PCI Translation 0 (sbtopci0)

0x104

4

Backplane to PCI Translation 1 (sbtopci1)

0x108

4

Backplane to PCI Translation 2 (sbtopci2)

Backplane to PCI Translation 2 (sbtopci2)

Bitmask

Meaning

0x4

Prefetch Enable

0x8

Burst Enable

0x20

Memory Read Multiple

Broadcasting Data Over the Bus

First write the address to the broadcast address register, then the data to the broadcast data register.


Exported/Archived from the wiki to HTML on 2016-10-27